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? 2015 microchip technology inc. ds20005404a-page 1 dn2450 features ? high-input impedance ? low-input capacitance ? fast switching speeds ? low on-resistance ? free from secondary breakdown ? low input and output leakages applications ? normally-on switches ? battery operated systems ? voltage to current converters ? constant current sources ? current and voltage limiters description this low threshold, depletion-mode, normally-on, tran- sistor utilizes an advanced vertical diffusion metal oxide semiconductor (dmos) structure and a well proven silicon-gate manufact uring process. this com- bination produces a device with the power-handling capabilities of bipolar transistors, plus the high-input impedance and positive-temperature coefficient inher- ent in metal-oxide semiconductor (mos) devices. characteristic of all mos structures, this device is free from thermal runaway and thermally-induced second- ary breakdown. vertical dmos field-effect transistors (fets) are ide- ally suited to a wide range of switching and amplifying applications where a very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. n-channel, depletion-mode, vertical dmos fet
dn2450 ds20005404a-page 2 ? 2015 microchip technology inc. package type to-252 (d-pak) see table 2-1 for pin information to-243aa (sot-89) gate source drain drain gate source drain
? 2015 microchip technology inc. ds20005404a-page 3 dn2450 1.0 electrical characteristics absolute maximum ratings ? drain-to-source voltage........................................................................................................ ........................................................ bv dsx drain-to-gate voltage.......................................................................................................... ..........................................................bv dgx gate-to-source voltage......................................................................................................... .......................................................... 20v operating and storage temperature .............................................................................................. ............................... -55c to +150c maximum junction temperature................................................................................................... ..................................................150c 1.1 electrical specifications note 1: all dc parameters are 100% tested at 25c unless otherwise st ated. pulse test: 300 s pulse, 2% duty cycle. 2: specification is obtained by characterization and is not 100% tested. ? notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect devi ce reliability. table 1-1: dc and ac characteristics electrical specifications: unless otherwise specified, for all specifications t a =t j = +25c symbol parameter min typ max units conditions dc parameters ( note 1 , unless otherwise stated) bv dsx drain-to-source breakdown voltage 500 ? ? v v gs = -5.0v, i d = 100a v gs(off) gate-to-source off voltage -1.5 ? -3.5 v v ds = 25v, i d = 10a ? v gs(off) change in v gs(off) with temperature ? ? -4.5 mv/c v ds = 25v, i d = 10a ( note 2 ) i gss gate body leakage ? ? 100 na v gs = 20v, v ds = 0v i d(off) drain-to-source leakage current ??1.0av ds = bv dsx , v gs = -10v ??1.0ma v ds = 0.8 bv dsx , v gs = -10v, t a = 125c ( note 2 ) i dss saturated drain-to-source current 700 ? ? ma v gs = 0v, v ds = 25v r ds(on) static drain-to-source on-state resistance ?7.010 ? v gs = 0v, i d = 300ma ? r ds(on) change in r ds(on) with temperature ? ? 1.1 %/c v gs = 0v, i d = 300ma ( note 2 ) ac parameters ( note 2 ) g fs forward transconductance 500 ? ? mmho v ds = 10v, i d = 300ma c iss input capacitance ? 150 200 pf v gs = -10v, v ds = 25v, f = 1mhz c oss common source output capaci- tance ?4055 c rss reverse transfer capacitance ? 15 25 t d(on) turn-on delay time ? ? 15 ns v dd = 25v, i d = 300ma, r gen = 25 ? , t r rise time ? ? 20 t d(off) turn-off delay time ? ? 15 t f fall time ? ? 15 diode parameters v sd diode forward voltage drop ? ? 1.8 v v gs = -5.0v, i sd = 300ma ( note 1 ) t rr reverse recovery time ? 800 ? ns v gs = -5.0v, i sd = 300ma ( note 2 )
dn2450 ds20005404a-page 4 ? 2015 microchip technology inc. 2.0 pin description the locations of the pins are listed in package type . table 1-2: typical thermal resistance package ja to-252 (d-pak) 81c/w to-243aa (sot-89) 133c/w table 1-3: thermal characteristics package i d 1 continuous (ma) 1. i d continuous is limited by max rated t j i d pulsed (ma) power dissipation @t a = 25c (w) i dr 1 (ma) i drm (ma) to-252 (d-pak) 350 1000 2.5 2 2. mounted on fr4 board, 25mm x 25mm x 1.57 mm 350 1000 to-243aa (sot-89) 230 900 1.6 2 230 900 table 2-1: pin description pin # to-252 pin # to-243aa function 11gate 3 3 source 2,4 2,4 drain
? 2015 microchip technology inc. ds20005404a-page 5 dn2450 3.0 application information figure shows the switching wa veform and test circuit for dn2450. figure 3-1: switching waveforms and test circuit 90% 10% 90% 90% 10% 10% pulse generator vdd r l output d.u.t. t (on) t d(on) t (off) t d(off) t r input input output 0v vdd r gen 0v -10v t f product summary bv dsx /bv dgx (v) r ds(on) (max) ( ? ) i dss (min) (ma) 500 10 700
dn2450 ds20005404a-page 6 ? 2015 microchip technology inc. 4.0 packaging information 4.1 package marking information legend: xx...x product code or customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec ? designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or custom er-specific information. package may or not include the corporate logo. 3 e 3 e 3-lead to-243aa * (sot-89) example xxxyyww nnn dn4e517 343 to-252 (d-pak) example yywwnnn xxxxx xxxx e 3 1517343 2450 dn e 3
? 2015 microchip technology inc. ds20005404a-page 7 dn2450 3-lead to-243aa (sot-89) package outline (n8) symbol a b b1 c d d1 e e1 e e1 h l dimensions (mm) min 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00 ? 1.50 bsc 3.00 bsc 3.94 0.73 ? nom-------- -- max 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20 jedec registration to-243, variation aa, issue c, july 1986. ? this dimension differs from the jedec drawing drawings not to scale . b b1 d d1 e h e1 c a 12 3 e e1 top view side view l note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging. note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging.
dn2450 ds20005404a-page 8 ? 2015 microchip technology inc. note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging.
? 2015 microchip technology inc. ds20005404a-page 9 dn2450 appendix a: revision history revision a (july 2015) ? update file to new format
dn2450 ds20005404a-page 10 ? 2015 microchip technology inc. product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: dn2450 = n-channel, depletion-mode, vertical dmos fet package: k4 = to-252 (d-pak) n8 = to-243aa (sot-89) environmental g = lead (pb)-free/rohs-compliant package media type: (blank) = 2000/reel examples: a) dn2450k4-g to-252 package, 2000/reel b) DN2450N8-G to-243aa package, 2000/reel part no. x device x environmental x x package options media - - type
? 2015 microchip technology inc. ds20005404a-page 11 dn2450 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights unless otherwise stated. trademarks the microchip name and logo, th e microchip logo, dspic, flashflex, flexpwr, jukeblox, k ee l oq , k ee l oq logo, kleer, lancheck, medialb, most, most logo, mplab, optolyzer, pic, picstart, pic 32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered trademarks of microchip te chnology incorporated in the u.s.a. and other countries. the embedded control solutions company and mtouch are registered trademarks of microc hip technology incorporated in the u.s.a. analog-for-the-digital age, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, ecan, in-circuit serial programming, icsp, inter-chip connectivity, kleernet, kleernet logo, miwi, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem.net, pickit, pictail, righttouch logo, real ice, sqi, serial quad i/o, total endurance, tsharc, usbcheck, varisense, viewspan, wiperlock, wireless dna, and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. gestic is a registered tradem ark of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2015, microchip technology incorporated, printed in the u.s.a., all rights reserved. isbn: 978-1-63277-585-6 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperi pherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem by dnv == iso/ts 16949 ==
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